The technology of silicon solar cells is relatively mature. After various practical applications, it is proved that the performance of silicon solar cells is stable and has practical value. Although the processes of various silicon solar cells are slightly different, the basic principles are the same, and only some changes are made to individual processes according to different requirements. The solar cell process mainly includes cleaning → rough polishing (ie chemical polishing, texturing (also known as surface texture) → cleaning → phosphorus diffusion → dephosphorization silicon glass (PSG) → cleaning → PECDV deposition of SiN, → screen printing. Electrodes (drying after printing the back electrode and back field) → (after printing the front electrode) sintering → removing the periphery → testing (I-V characteristic test) several parts.
(1) Cleaning
Cleaning refers to chemical cleaning of silicon wafers. It is mainly used to remove impurities that affect the performance of solar cells.
1) Types of impurities.
① Molecular impurity adsorption, such as natural or synthetic oil, wax, rosin, etc.
②Adsorption of ionic impurities, such as K+, Na+, Ca+, F-, CI+, CO32-, etc.
③Atomic impurity adsorption, such as gold, platinum, copper, iron and other metal atoms.
2) Cleaning method
① Clean the surface of the silicon wafer several times with deionized water to remove large impurity particles on the surface of the silicon wafer.
②Ultrasonic cleaning with detergent for several times, and then rinse with plenty of cold and hot deionized water for several times to remove the grease on the surface of the silicon wafer.
- Boil the silicon wafer with concentrated sulfuric acid until white smoke is emitted. After taking it out, rinse it with a large amount of cold and hot deionized water several times to further remove organic impurities on the surface of the silicon wafer.
④Boil the silicon wafer with aqua regia (HCI:HNO3=3:1) until the color changes from yellow to light, then take it out and rinse it several times with a large amount of cold and hot deionized water to remove heavy metals that are difficult to remove with concentrated sulfuric acid impurities,
⑤Remove the mechanical damage on the surface of the silicon wafer, and then polish the silicon wafer. The ratio of the polishing solution is HNO3:HF:CH3CHOOH=3:1:1, the polishing time is 2~3min, and then a large amount of cold and hot deionization is used. Rinse with water several times.
⑥ Use No. 1 solution (H2O:H2O2:NH3NH4=5:2:1) to boil the silicon wafer and take it out, then rinse it with a lot of cold and hot deionized water.
⑦No. Ⅱ solution (H2O:H202:HCl=8:2:1) boil the silicon wafer to boiling and take it out for 2 minutes, and then rinse it with a lot of cold and hot deionized water. The above steps ⑥ and ⑦ are mainly to remove heavy metals that cannot be removed by aqua regia.
⑧ After taking it out, dry it under infrared light to prepare for diffusion.
(2) Rough throwing
The purpose of rough polishing is to remove mechanical damage and oil stains on the surface of the silicon wafer, so that the surface of the silicon wafer is smooth and clean. The chemical etchant used is a NaOH solution with a concentration of 10%. The etching temperature is about 80 °C. The reaction time depends on the thickness of the silicon wafer, generally 1~2min. Its chemical reaction formula is:
The containers for fixing silicon wafers for rough polishing and texturing are plastic flower baskets with battens.
(3) Texturing
Immediately after rough throwing, put it into the texturing liquid to make texturing (note: put it slowly and gently to prevent the surface of the silicon wafer from being rapidly oxidized). The concentration of rough polishing liquid is 1% (can be 1%~2%) NaOH solution (low alkali) + 10% absolute ethanol (CH3CH2OH). NaOH is the most commonly used selective chemical etchant. Its formula is:
The temperature of the texturing solution for etching and texturing the silicon wafer is about 77°C, and the duration is about 45 minutes, and the reaction formula is the same as that of rough polishing.
In the process of texturing, in addition to adding absolute ethanol at the beginning, anhydrous ethanol should be added every 10 minutes, 100 mL each time. The function of anhydrous ethanol is to quickly take away the H2 bubbles (because ethanol is volatile), prevent the bubbles from being adsorbed on the surface of the silicon wafer, accelerate the corrosion rate, and also promote the formation of the “Great Pyramid” and form a good suede texture . In addition, when cold ethanol is added to the hot solution, due to the high density of cold ethanol, the solution can be fully mixed and stirred, so that the reaction on the surface of the silicon wafer is more uniform.
After texturing, it is necessary to neutralize the residual NaOH solution on the surface of the silicon wafer. The neutralization process can be completed by washing with deionized water. The intuitive standard for judging whether the texturing is good or bad is to observe whether the color of the suede is uniform, whether there is flower basket print, white or not. edge or raindrops.
(4) Diffusion
1) Diffusion principle. The P-N junction is the heart of the solar cell, and the diffusion junction is the key process. Diffusion is a natural phenomenon caused by the thermal motion of material molecules or atoms. The existence of differences in particle concentration is a necessary condition for the generation of diffusion motions. For the diffusion process of solar cells, since the P-N junction formed by diffusion is parallel to the surface of the silicon wafer, and the diffusion depth is very shallow, it can be approximated that the diffusion is only along the direction perpendicular to the surface of the silicon wafer and into the body (x direction) conduct. The diffusion equation is:
In the formula, t is the diffusion time, D is the diffusion coefficient of the impurity at the diffusion temperature, and N(r) is the impurity concentration at each point in the silicon wafer. Equation (1-9) describes the change rule of the impurity concentration at each point in the silicon wafer with time during the diffusion process. For different initial conditions and diffusion conditions, the equation has different forms of solutions. Two diffusion profiles are common in the production of planar devices: a co-error function profile for constant surface impurity concentration and a Gaussian function profile for a defined impurity source.
In the diffusion process of solar cells, the important factors affecting the diffusion are: diffusion temperature, diffusion time and diffusion atmosphere (carrying impurity sources). The parameters that need to be measured often include: the total amount of impurities diffused into the silicon wafer (reflected by the sheet resistance R□), the depth of diffusion (ie the junction depth xi of the P-N junction), the surface impurity concentration N of the silicon wafer and the silicon wafer Impurity distribution N(x) in the body.
2) The principle of POCl3 diffusion process. It is a diffusion method that uses gas to carry a liquid diffusion source. Generally, chlorine gas is used to carry diffusion impurities through the impurity source bottle, and the content of diffusion impurities in the diffusion atmosphere is controlled by controlling the flow rate of the gas. The most used liquid phosphorus source is POC13, which is a colorless and transparent liquid at room temperature and has a high saturated vapor pressure. The following decomposition reactions occur at 600 °C:
A certain amount of oxygen is often passed in the diffusion atmosphere, which can further decompose the generated PCl5 and oxidize phosphorus pentachloride to P2O5, so that more phosphorus atoms can be deposited on the surface of the silicon wafer. In addition, the corrosion effect of PCl5 on the silicon wafer can also be avoided, and the surface of the silicon wafer can be improved. The reaction formula is as follows:
The generated P2O5 continues to react with silicon to obtain phosphorus atoms at the diffusion temperature, and the reaction formula is as follows:
Due to the high saturated vapor pressure of POCl3, the phosphorus atoms deposited on the surface of the silicon wafer can fully reach the saturation value at this diffusion temperature (that is, the solid solubility of phosphorus in silicon at this temperature), and continue to diffuse into the Silicon body, forming a high-concentration emitter. At 1100℃, the solid solubility of phosphorus in silicon is about 1.3×1021 cm-3. Therefore, high surface impurity concentration can be obtained by diffusion in POCl3 atmosphere. The device in POCl3 diffusion mode is shown in Figure 1. In addition to the advantages of simple equipment, convenient operation, suitable for mass production, and good diffusion repeatability and stability, the device also has the following advantages.
①The process of closed, tube furnace is easy to keep clean.
②Diffusion on both sides has a good gettering effect.
③The chlorine in the doping source has a cleaning effect in the process.
④ The deposition of the dopant is very uniform.
Therefore, this diffusion mode is a more commonly used method in industrial production.
(5) PECVD deposition of SiNx
One of the reasons for the impairment of solar cell efficiency is that the photogenerated carrier electrons and holes of the solar cell recombine before being separated by the P-N junction. The shorter the lifetime of the photogenerated carriers, the greater the possibility of recombination before being separated by the P-N junction, and the efficiency of the solar cell decreases significantly when other factors such as series resistance and electrode preparation are the same. The recombination of photogenerated carriers can occur inside the cell or on the surface. Because the periodicity of the crystal lattice on the surface is interrupted to introduce interface states, the recombination of photogenerated carriers can occur on the surface of the solar cell. The effective lifetime of photogenerated carriers in solar cells is determined by both the bulk lifetime and the surface effective lifetime. Its relationship is:
The effect of recombination on the surface of silicon wafers on the effective minority carrier lifetime is very obvious. Implementing surface passivation is an important measure to reduce surface recombination and improve the effective minority carrier lifetime. Surface recombination refers to the recombination process of minority carriers on the semiconductor surface. The number of electrons or holes passing through a unit area per unit time is called the surface recombination rate.
Taking the N region as an example, the surface recombination current due to the presence of surface recombination:
where q is the electron charge, A is the surface area of the solar cell, Nts is the surface state density of the solar cell, c is the surface hole capture rate, the product of c and Nts is the surface recombination rate, and ΔPn is the surface excess hole concentration . It can be seen from the above equation that there are two ways to reduce the surface recombination current by performing surface passivation: reducing the surface state density and reducing the surface excess carrier concentration.
The method to reduce the excess carrier concentration on the surface is to introduce fixed charges in the top layer of the solar cell surface to form an electric field effect, so that the photogenerated carriers are forced to leave the surface by the electric field. Decreasing the surface density of states reduces the surface recombination rate and thus reduces the recombination current. The density of surface states is related to the crystal orientation. The dangling bond densities of <111>, <110>, and <100> crystal orientations are 7.83×1014cm-2, 9.59×1014cm-2, 13.36×1014cm-2, respectively.
The surface state energy level is located in the center of the forbidden band and is an effective recombination center. The main mode of surface passivation is dangling bonds on the surface of saturated semiconductors, reducing surface activity, thereby reducing the surface recombination rate of carriers. The passivation methods of dangling bonds on the surface of saturated semiconductors include silicon dioxide, aluminum oxide, nitride Silicon, phosphosilicate glass and a combination of multi-layer passivation films, etc. After the diffusion, a layer of phosphosilicate glass is formed on the surface of the silicon wafer, which also has a passivation effect on the silicon wafer. The minority carrier lifetime measured after the PSG is removed is shorter than that before the PSG is removed. Due to the instability of phosphosilicate glass, in the process of making solar cells, growing silicon dioxide film is a common method in the laboratory, and PEVCD deposition of SiNx film is a common method in industrial production.
The principle of PECVD technology is to use low-temperature plasma as the energy source, place the sample on the cathode of the glow discharge under low pressure, use the glow discharge (or add a heating element) to heat the sample to a predetermined temperature, and then introduce an appropriate amount of reaction The gas, which undergoes a series of chemical reactions and plasma reactions, forms a solid film on the surface of the sample. The PECVD method is different from other CVD methods in that the plasma contains a large number of high-energy electrons, which can provide the activation energy required for the chemical vapor deposition process. The collision of electrons and gas phase molecules can promote the decomposition, combination, excitation and ionization process of gas molecules, and generate various chemical groups with high activity, which can significantly reduce the temperature range of CVD film deposition, so that the original need to be carried out at high temperatures. The CVD process can be realized at low temperature. An essential feature of PECVD is the low temperature (<450°C) of the thin film deposition process. Therefore, it can save energy and reduce costs; increase production capacity; and reduce the lifetime attenuation of minority carriers in silicon wafers caused by high temperature.
When SiNx is deposited by PECVD, it not only grows SiNx as an anti-reflection film, but also generates a large amount of atomic hydrogen. These hydrogen atoms can have dual effects of surface passivation and bulk passivation on the silicon wafer, and can passivate the silicon in the silicon well. dislocations and surface dangling bonds, thereby improving the carrier mobility in the silicon wafer. At the same time, the SiNx film has a very obvious passivation effect on the surface of single crystal silicon.
(6) Preparation of electrodes
In order to output the electrical energy of the solar cell, two electrodes, positive and negative, must be made on the battery. Electrodes are conductive materials that form good ohmic contact with both ends of the battery’s P-N junction. The electrode in contact with the P-type region is the positive electrode of the current output, and the electrode in contact with the N-type region is the negative electrode of the current output. It is customary to call the electrode made on the light side of the battery as the emitter or front electrode, and the electrode made on the back of the battery as the back electrode. The emitter is usually made into a narrow grid line to overcome the resistance of the diffusion layer and reduce the shading area, and the current is collected by two wider main grid lines, so the emitter is also vividly called the gate. Usually the back electrode is covered with all or most, part of the back area (the current is also collected by two grid lines) to reduce the series resistance of the battery.
Electrode materials for silicon solar cells should meet the following requirements: can form a firm contact with silicon; should be ohmic contact with low contact resistance; have excellent electrical conductivity; appropriate purity; good chemical stability; Welding; lower price and other requirements.
Silver metal has good electrical conductivity and is often used to make positive electrodes of industrial silicon solar cells, but it also has the disadvantage of being expensive. And because aluminum is cheap, high purity, easy to source, less damage to P-N junction characteristics, relatively simple process control, and aluminum and silicon can form a strong ohmic contact, so aluminum is often used to make silicon solar cells The back electrode of the battery. In addition, doping aluminum in silicon can form a P+ type semiconductor, so using aluminum as the back electrode of the battery can form a P+/P concentration junction on the back of the battery, resulting in a back electric field structure (BSF), commonly known as aluminum back field. At the same time, considering that the electrical conductivity of aluminum is not very good, and it is not easy to weld, it is necessary to print two silver-aluminum electrodes immediately to facilitate the welding between batteries, which is the aluminum-silver electrode.
(7) Sintering of electrodes
The sintering of electrodes has a decisive effect on the quality of electrode preparation. The quality and quantity of the electrodes have an important relationship with the temperature distribution in the sintering furnace, the advancing speed of the mesh belt that transfers the silicon wafers (mainly affecting the sintering time), the cleanliness of the silicon wafers, and the cleanliness of the sintering furnace.
Three important temperatures need to be clarified before the whole sintering: the minimum eutectic temperature of aluminum-silicon alloy is 577℃, the minimum eutectic temperature of silver-silicon alloy is 830℃, and the minimum eutectic temperature of silver-aluminum alloy is 567℃.
①Temperature distribution in the chain sintering furnace. When sintering the backside aluminum backfield, if the temperature reaches 577°C, the aluminum-silicon alloy will soon form, so that the N-type layer formed by the diffusion on the backside is restored to the P-type layer again, and the silver-aluminum is also alloyed. An ohmic contact to the back electrode is formed. When the temperature is gradually lowered, part of the aluminum in the aluminum-silicon alloy will be precipitated due to saturation, and the remaining aluminum will cause the silicon to form a highly doped P+ layer, forming a P+/P concentration junction on the back of the battery, resulting in aluminum Back Field Structure (BSF). If the aluminum layer is too thin, the backside phosphorus diffusion will not be well masked.
In this way, it is possible to form a highly compensated layer on the back side, so that the battery has a large series resistance and basically no back field effect, and it can also keep the N-type back surface, and the whole battery has an N+-P-N structure, and there is no back field effect at all. If the aluminum layer is too thick, the aluminum layer will easily shrink during phosphorus diffusion and sintering, resulting in uneven P-P+ junctions, and even serious aluminum-silicon alloy corrosion pits.
The sintering of the front silver electrode is more difficult, because the sintering temperature is too low, the electrode grid line is not firmly combined with the silicon wafer, and the series resistance increases. If the sintering temperature is too high, although the fastness increases, the parallel resistance of the solar cell will become smaller, and the front P-N junction may be destroyed, making the parallel resistance of the solar cell smaller, the electrical performance will be deteriorated, and the front P-N junction may even be damaged. Burn through, making the solar cell ineffective. Therefore, the sintering of the front silver electrode is very critical. The minimum eutectic temperature of silver-silicon alloy is 830℃, and the maximum temperature range of general chain sintering furnace is 720℃~780℃. Generally, the maximum temperature of the chain sintering furnace is 760℃. To sum up, the temperature distribution in the chain sintering furnace can be divided into four areas: the drying area where the temperature gradually increases (the temperature is 200℃~500℃), the sintering back side The electrode area (temperature between 500°C and 650°C), the area where the front silver electrode is sintered (temperature between 650°C and 780°C), and the cooling area for cooling the silicon wafer (the temperature naturally decreases).
②The forward speed of the mesh belt conveying the silicon wafer (total sintering time). The speed of the transfer mesh belt and the temperature of the constant temperature zone should be well matched to ensure that there is an appropriate constant temperature time to make the temperature between the silicon wafer and the metal electrode reach equilibrium, and at the same time to ensure the firmness of the metal electrode. If the network speed is too fast, since the heating rate of the silicon wafer is slower than that of the metal electrode grid line, there is not enough constant temperature time for the temperature to reach equilibrium, so the electrode grid line is not firm. However, if the speed of the mesh belt is too slow, the silicon wafer is kept at high temperature for too long, which is likely to damage the P-N junction on the front side of the battery. The specific mesh belt speed should have a small change according to different conditions, so that the contact between the metal electrode and the silicon wafer can achieve the best sintering effect without reducing the performance of the front P-N junction, usually 6.0~7.0 (per minute). about 180mm).
To sum up, the crystalline silicon solar cell needs to print the metal paste three times, the traditional process needs two sintering to form a good ohmic contact with metal electrodes, and the co-firing process only needs one sintering, and the ohmic contact of the upper and lower electrodes is formed at the same time. Contact is a key process for high-efficiency crystalline silicon solar cells.
In addition, the silicon wafers printed with silver paste, silver-aluminum paste, and aluminum paste are completely volatilized by drying the organic solvent, and the film layer shrinks into a solid substance that adheres closely to the silicon wafer. At this time, it can be regarded as the metal electrode material layer and The silicon wafers touch together. The so-called co-firing process uses the eutectic temperature of silver-silicon, and at the same time, the single-crystal silicon atoms are melted into the metal electrode material within a few seconds, and then cooled almost simultaneously to form a recrystallized layer. The lattice structure of crystalline silicon. Only one sintering passivates the hydrogen atoms on the surface layer, and the escape is limited. The co-firing ensures the existence of a large number of hydrogen atoms, and the filling factor is high, so there is no need to introduce the hydrogen chloride baking process (FGS).
(8) Go to the surrounding area
The peripheral P-N junction formed after the P-type silicon wafer is diffused in the POCl3 atmosphere can be powered up and down and extremely short-circuited, so the peripheral P-N junction must be removed. The N-type layer on the back side can be eliminated by the compensation method, that is, removed with a screen-printed aluminum paste, and then sintered to return the N-type layer to the P-type. Use laser cutting or plasma etching to remove the periphery. In the industrial production of solar cells, plasma etching is generally used to remove peripheral P-N junctions.
Laser cutting can be done after solar cell electrode printing and sintering. Lasers with highly concentrated energy can cut silicon wafers by melting them. If the laser intensity is too strong or the laser running speed is too slow, the silicon wafer may be cut through. Usually, the diffusion layer of the silicon wafer is only about 0.4um. Both silicon and N-type silicon form a current channel with the front electrode, which greatly reduces the parallel resistance and short-circuits the solar cell in severe cases. When laser cutting the periphery, the laser beam must be irradiated on the back electrode, and the silicon wafer cannot be broken down by the laser, and the intensity and running speed of the laser should be controlled well.
(9) Electrical parameters and I-V characteristic test
The test is mainly used to test the five main electrical performance parameters of the solar cell. The test of these parameters and the test of the I-V characteristic curve are often linked together.
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